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 T6B66BFG
TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC
T6B66BFG
ROW DRIVER LSI FOR DOT MATRIX LCD
The T6B66BFG is a row (common) driver LSI for a small- or medium-scale dot matrix LCD. The T6B66BFG generates timing signals for the display using an on-chip oscillator and also controls the T6B65AFG column (segment) LCD driver. Four duty options are available: 1/17, 1/33, 1/49 and 1/65. The IC is equipped with 65 low-impedance row-driver outputs. Moreover, the IC incorporates internal resistors to divide the bias voltage, a power supply operational amplifier, DC-DC converter and a contrast control circuit; it is therefore easy to construct a low-power LCD system consisting of a T6B66BFG and a T6B65AFG column (segment) LCD driver. T6B66BFG is lead (Pb)-free product.
QFP100-P-1420-0.65Q Weight: 1.6 g (typ.)
Features
Row signal for LCD 65 low-impedance LCD driver outputs On-chip oscillator with external resistor and internal capacitor Duty : 1/17, 1/33, 1/49, 1/65 Low power consumption Logic power supply : 2.7 to 5.5 V LCD power supply : VDD - 4.0 to VDD - 16.0 V CMOS Si-Gate process 100-pin plastic flat package
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T6B66BFG
Block Diagram
*: When external clock operation is used, the clock should be input to OSC1.
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Pin Assignment
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Pin Functions
Pin Name COM1 to COM65 CL PM / / LE / WR DB0 to DB5 Pin No. 8 to 72 99 100 3 89 88 92 to 97 I/O Output Output Output Output Input Input Input Row driver outputs Shift clock pulse for T6B65AFG Pre-Frame signal for T6B65AFG Clock signal for T6B65AFG Latch Enable signal Write Enable signal Data bus Display duty select Display Duty DS1 DS2 Frequency select FS1 FS1, FS2 6, 7 Input 0 1 0 1 / STB / RST OSC1, OSC2 VOUT1 VOUT2 CnA to CnB VDD, VSS VLC1 to VLC5 VEE 87 91 1, 2 82 79 85, 86, 83, 84, 80, 81 90, 98 73 to 77 78 Input Input Input Output Output FS2 0 0 1 1 fOSC (kHz) 26.88 53.76 215.0 430.1 fPM (Hz) 35 35 35 35 f / (kHz) 13.44 26.88 107.5 215.0 1 / 17 0 0 1 / 33 1 0 1 / 49 0 1 1 / 65 1 1 Functions
DS1, DS2
4, 5
Input
Standby pin: When / STB = L, all clocks stop. Reset signal pin: When / RST = L, registers are cleared. When using the internal clock oscillator, connect a resistor or ceramic oscillator between OSC1 and OSC2. When using an external clock, connect the clock to OSC1 and leave OSC2 open. DC-DC output pin DC-DC output pin Connect using a capacitor for the DC-DC converter (n = 1 to 3) Power supply Power supply for the LCD drive Power supply for the LCD drive
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Function of Each Block
Oscillator
The T6B66BFG has an on-chip oscillator with one external resistor.
Relation between oscillation frequency and Rf
Rf 51 k 110 k 460 k 1100 k fOSC 430 kHz 215 kHz 54 kHz 27 kHz FS1 H L H L FS2 H H L L
Note: The resistance values are typical values. The oscillation frequency depends on how the device is mounted. It is necessary to adjust the oscillation frequency to a target value.
Timing generation circuit
This circuit divides the signals from the oscillator and generates display timing signals (CL, PM) and the operating clock ( / ) signal.
Shift register
65-bit shift register
DC-DC converter (tripler and quadrupler)
The T6B66BFG has an on-chip DC-DC tripler and quadrupler. When / STB = L, VOUT1 and VOUT2 = VDD. A 2.2 to 10-F capacitor is recommended for this DC-DC Converter.
Quadrupler mode
Tripler mode
When not using the DC-DC converter, leave the CnA, CnB and VOUTn pins open and connect an external VEE supply.
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Row driver circuit and LCD voltage generation circuit
The row driver circuit consists of 65 driver circuits. The combination of the data from the shift register and the Frame signal selects one of the four LCD levels. Details of the voltage generation circuit and the row driver circuit are shown in the diagram below.
Resistor ladder, contrast control circuit
The T6B66BFG has an on-chip resistor with an op-amp, bias selector and a contrast control circuit. The contrast control circuit allows 32 levels of contrast adjustment by software. The bias selector uses software to select the bias: 1 / 5, 1 / 7, 1 / 8 or 1 / 9. Details of the resistor ladder and the contrast control circuit are shown in the diagram below.
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Command Details
DB5 1 0 0 0 0 0 1 1 1 0 0 DB4 DB3 DB2 DB1 Code DB0 Set Contrast Function
CONTRAST (0 to 31) 1 0 0 0 0
*
1 0 1 0
*
1/0
*
1/0 1/0 R2 1/0
Test Mode Select Op-Amp Control OP1 Op-Amp ON / OFF Bias Control Display ON / OFF
*
R1 1
*: INVALID
Set contrast
DB5 1 DB4 D DB3 D DB2 D DB1 D DB0 D
Range: 20H to 3FH This command sets the contrast for the LCD. The T6B66BFG has 32 levels of contrast: 20H (bright) 3FH (dark).
Test mode select
DB5 0 DB4 1 DB3 1 DB2 * DB1 * DB0 * *: INVALID
This command selects the test mode. Do not use this command.
Op-Amp control 1 (OP1)
DB5 0 DB4 1 DB3 0 DB2 1 DB1 1/0 DB0 1/0
Range: 14H to 17H This command sets the power supply level for the op-amp. This command selects one of four levels. The command 14H selects the lowest level and 17H the maximum level. Notes: When L is input to / RST, the power supply level is the minimum level.
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Op-amp ON / OFF
DB5 0 DB4 1 DB3 0 DB2 0 DB1 * DB0 1/0 Op-amp ON (0) / OFF (1) *: INVALID
Range: 10H to 11H This command sets the op-amp ON / OFF. When using an external op-amp, the command 11H is used.
Bias control
DB5 0 DB4 0 DB3 0 DB2 1 DB1 1/0 DB0 1/0 SET UP 04H 05H 06H 07H BIAS 1/5 1/7 1/8 1/9
Range: 04H to 07H This command sets the bias for the LCD power supply.
Display ON / OFF
DB5 0 DB4 0 DB3 0 DB2 0 DB1 1 DB0 1/0 Display ON (1) / OFF (0)
Range: 02H to 03H This command controls the display ON / OFF setting. When the display is OFF, all the common output waveforms return to the VDD level. Note: When L is input to / RST, the display is set to OFF.
Absolute Maximum Ratings (Ta = 25C)
Item Supply Voltage (1) Supply Voltage (2) Input Voltage Operating Temperature Storage Temperature Symbol VDD (Note 1) VEE1, 2 (Note 3) Vin (Note 1, 2) Topr Tstg Rating -0.3 to 7.0 VDD - 18.0 to VDD + 0.3 -0.3 to VDD + 0.3 -20 to 75 -55 to 125 Unit V V V C C
Note 1: Referenced to VSS Note 2: Applies to data bus and I / O pins Note 3: Ensure that the following condition is always maintained: VDD VEE1, VEE2.
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Electrical Characteristics DC Characteristics Test Conditions (1)
Item Operating Supply (1) Operating Supply (2) H Level L Level H Level L Level Symbol VDD VEE VIH VIL VOH VOL Rrow
(Unless otherwise noted, VSS = 0 V, VDD = 3.0 10%, VDD - VEE = 16 V, Ta = -20 to 75C)
Test Circuit IOH = -400 A IOL = 400 A VDD - VLC5 = 16.0 V Load current = 100 A Test Condition Min 2.7 VDD -16.0 0.8 VDD 0 VDD -0.4 Typ. Max 3.3 VDD -4.0 VDD 0.2 VDD 0.4 1.5 Unit V V V V V V k Pin Name VDD VEE DS1, DS2 DB0 to DB5, / LE, / WR, / STB, / RST, FS1, FS2 CL, PM, / COM1 to COM65 DB0 to DB5, / LE, / WR, / STB, / RST, FS1, FS2, DS1, DS2 / OSC1 OSC1 OSC1 VSS VEE VDD VDD
Input Voltage
Output Voltage
Row Driver Output Resistance
Input Leakage
IIL
Vin = VDD to VSS
-1
1
A
Operating Frequency External Clock Frequency External Clock Duty External Clock Rise / Fall Time Current Consumption (1) Current Consumption (2) Current Consumption (3) Current Consumption (4)
f fex fduty tr / tf ISS IEE IDD ISTB
1 2 3 4
(Note 1) (Note 2) (Note 3) (Note 4)
10 20 45 -1
50 -200 -60 430
250 500 55 50 -300 -80 550 1
kHz kHz % ns A A A A
: VEE = VDD - 16 V, 1 / 65 duty, Rf = 47 k, no load, op-amp minimum power supply level Note 2: LCD driver current : VEE = VDD - 16 V, 1 / 9 bias, Rf = 47 k, no load, op-amp minimum power supply level Note 3: All currents : VDD = 3.0 V, VOUT2 = VEE (quadrupler mode), 1 / 65 duty, 1 / 9 bias, Rf = 47 k, no load, op-amp minimum power supply level Note 4: Standby current : VDD = 3.0 V 10%, VOUT = VEE, Ta = 25C, / STB = L, no load
Note 1: Logic current
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Test Conditions (2)
Item Operating Supply (1) Operating Supply (2) H Level L Level H Level L Level
(Unless otherwise noted, VSS = 0 V, VDD = 5.0 10%, VDD - VEE = 16 V, Ta = -20 to 75C)
Symbol VDD VEE VIH VIL VOH VOL Rrow Test Circuit IOH = -400 A IOL = 400 A VDD - VLC5 = 16.0 V Load current = 100 A Test Condition Min 4.5 VDD -16.0 0.7 VDD 0 VDD -0.4 Typ. Max 5.5 VDD -4.0 VDD 0.3 VDD 0.4 1.5 Unit V V V V V CL, PM, / V k COM1 to COM65 DB0 to DB5, / LE, / WR, / STB, / RST, FS1, FS2, DS1, DS2 / OSC1 OSC1 OSC1 VSS VEE VDD VDD Pin Name VDD VEE DS1, DS2 DB0 to DB5, / LE, / WR, / STB, / RST, FS1, FS2
Input Voltage
Output Voltage
Row Driver Output Resistance
Input Leakage
IIL
Vin = VDD to VSS
-1
1
A
Operating Frequency External Clock Frequency External Clock Duty External Clock Rise / Fall Time Current Consumption (1) Current Consumption (2) Current Consumption (3) Current Consumption (4)
f fex fduty tr / tf ISS IEE IDD ISTB
1 2 3 4
(Note 5) (Note 6) (Note 7) (Note 8)
10 20 45 -1
50 -490 -60 680
250 500 55 50 -680 -80 900 1
kHz kHz % ns A A A A
: VEE = VDD - 16 V, 1 / 65 duty, Rf = 47 k, no load, op-amp minimum power supply level Note 6: LCD driver current : VEE = VDD - 16 V, 1 / 9 bias, Rf = 47 k, no load, op-amp minimum power supply level Note 7: All currents : VDD = 5.0 V, VOUT1 = VEE (tripler mode), 1 / 65 duty, 1 / 9 bias, Rf = 47 k, no load, op-amp minimum power supply level Note 8: Standby current : VDD = 5.0 V, VOUT = VEE, Ta = 25C, / STB = L, no load
Note 5: Logic current
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Item Output Voltage (Tripler Mode) Output Voltage (Quadrupler Mode) Symbol VO1 VO2 Test Circuit 5 6 Test Condition (Note 9) (Note 10) Min -9.47 -8.07 Typ. -9.57 -8.22 Max Unit V V Pin Name VOUT1 VOUT2
Note 9: VDD = 5.0 V, ILoad = 500 A, VEE = -10.0 V (external voltage) CnA - CnB = 2.2 F, VDD - VOUT1 = 2.2 F, Rf = 47 k, Ta = 25C Note 10: VDD = 3.0 V, ILoad = 500 A, VEE = -9.0 V (external voltage) CnA - CnB = 2.2 F, VDD - VOUT2 = 2.2 F, Rf = 47 k, Ta = 25C
AC Characteristics
Test Conditions (1) (VSS = 0 V, VDD = 3.0 V 10%, VDD - VEE = 16 V, Ta = -20 to 75C)
Item Enable Rise / Fall Time Enable Pulse Width Data Set-up Time Data Hold Time Symbol tEr, tEf PWEL tDS tDHW Min 60 60 10 Max 25 Unit ns ns ns ns

Test Conditions (2) (VSS = 0 V, VDD = 5.0 V 10%, VDD - VEE = 16 V, Ta = -20 to 75C)
Item Enable Rise / Fall Time Enable Pulse Width Data Set-up Time Data Hold Time Symbol tEr, tEf PWEL tDS tDHW Min 60 60 10 Max 20 Unit ns ns ns ns
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Test Circuit
1. 2. 3. 4.
*: / LE, / WR, DB to DB5 connected to VDD
5. Tripler Mode
6. Quadrupler Mode
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Application Circuit (1)
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Package Dimensions
QFP100-P-1420-0.65Q
Weight :1.6g (Typ.)
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